Digital Design Facility
Cadence University Program Member

The department is pleased to participate in the university support program of Cadence Design Systems. Our degree programs are designed to provide students with hands-on skills and the knowledge required to be proficient with modern circuit design and analysis software tools.
To prepare our students we incorporate the use of Cadence products such as, PSpice, OrCAD, and Allegro Design Entry CIS Capture and Layout software tools in our curriculum.

Our VHDL elective classes uses the VHDL desktop and simulator.
Advanced Digital Design also uses these tools as well as FormalCheck model checker and the BuildGates synthesis tool. The Capture schematic entry and PCB design tools (OrCAD) also come into play.
Tools for Electrical EngineersMicroprocessor Design uses Capture schematic entry and HDL design tools.
The Wireless Communication elective is developing new projects for the Wireless System-Level Verification tools.
The introductory Digital Operations class finds the VHDL tools useful and both the Circuits and Electronics sequences make use of PSpice. They also make some use of the schematic entry tool in the OrCAD suite.

Contacts: Professor Alvin T. Moser, [almoser@seattleu.edu], Seattle University.

Webmaster for this page: Gary L Fernandes, [fernandg@seattleu.edu], Seattle University.
Page last updated: March 19, 2008.

Cadence is a registered trademark of Cadence Design Systems, Inc., 2655 Seely Avenue, San Jose, CA 95134.

Department of Electrical & Computer Engineering | 901 12th Ave. BANNAN 209, Seattle, WA 98122
Department desk: ecedept@seattleu.edu Telephone: 206.296.5970 FAX: 206.296.5962